In recent years, in order to meet demands for high-speed semiconductor devices, there has been proposed semiconductor devices, such as a high-speed MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) in which a Si layer that is epitaxially grown on a Si (silicon) substrate through a SiGe (Silicon Germanium) layer is used in a channel region.
In this case, because SiGe crystal has a larger lattice constant than that of Si crystal, tensile strain is being generated in the Si layer that is epitaxially grown on the SiGe layer (hereinafter, such a Si layer in which strain is being generated is called as a strained Si layer). By its strain stress, an energy band structure of the Si crystal is changed and therefore degeneracy of the energy band is dissolved and an energy band with high carrier-mobility is formed. Therefore, MOSFET, in which the strained Si layer is used as the channel region, indicates a higher-speed operating characteristic at approximately 1.3 to 8 times than that of a general MOSFET.
Because magnitude of the tensile strain to be generated in the strained Si layer becomes larger as a Ge concentration in the SiGe layer becomes higher, a Ge concentration in the SiGe layer is an important parameter. Hereinafter, the SiGe layer whose Ge composition ratio is X (0<x<1) is occasionally described as Si1-XGeX layer.
As a method for forming such a strained Si layer, there is a method for using an SOI wafer in which on a silicon support layer, an insulator layer such as a BOX (Buried OXide) layer is formed and thereon a silicon active layer (SOI layer) is formed. In the method, the SiGe layer is epitaxially grown on the SOI wafer, and then an oxide film is formed on a surface of the SiGe layer by an oxidation heat treatment so that the SiGe layer is enriched (oxidized and enriched) to have a desired Ge concentration, and thereon the Si layer is epitaxially grown to be a strained Si layer (see, for example, N. Sugiyama et al., Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials, Nagoya, 2002, pp. 146-147, and T. Tezuka et al., Appl. Phys. Lett., Vol. 79, No. 12, pp. 1798-1800, 17 Sep. 2001). Moreover, there has been disclosed a method for oxidizing and enriching a wafer in which on the SOI wafer, a SiGe crystal layer is formed and further a Si crystal layer is formed (see, Japanese Patent Application (Kokai) No. 2000-243946). A wafer in which the SiGe layer is formed on the insulator film as described above is occasionally described as an SGOI (SiGe On Insulator) wafer.
In addition, there is a report that conventionally, when the SiGe layer is enriched to have a desired Ge concentration in the oxidation heat treatment, for sufficiently relaxing lattice so that the SiGe layer has a nearer intrinsic lattice constant determined by the Ge concentration, a thickness of the SiGe layer has to be 130 nm or more (see, Tezuka et al, page 23 of 61th workshop information packet in Separate Meeting for Bulk Growth in Japanese Association for Crystal Growth Cooperation, 28 May 2004).